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Thursday, 28 May 2015

VHSIC Hardware Description Language (VHDL)

VHDL (VHSIC Hardware Description Language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits.
Analyzing the design and then Elaborate it
The IEEE Standard 1076 defines the VHSIC Hardware Description Language or VHDL. It was originally developed under contract F33615-83-C-1003 from the United States .Air Force awarded in 1983 to a team with Intermetrics Inc. as language experts and prime contractor, with Texas Instruments as chip design experts and IBM as computer system design experts. The development of logic synthesis tools that read the VHDL, and output a definition of the physical implementation of the circuit.
VHDL was originally developed at the behest of the U.S Department of Defense in order to document the behavior of the ASICs that supplier companies were including in equipment.

The initial version of VHDL, designed to IEEE standard IEEE 1076-1987,included a wide range of data types, including numerical (integer and real), logical (bit and boolean), character and time, plus arrays of bit called bit_vector and of character called string.
A problem not solved by this edition, however, was "multi-valued logic", where a signal's drive strength (none, weak or strong) and unknown values are also considered. This required IEEE standard 1164, which defined the 9-value logic types.The updated IEEE 1076, in 1993, made the syntax more consistent,In newer version this problem resolved successfully.


Revisions:

1. IEEE 1076-1987 First standardized revision of ver 7.2 of the language from the United States Air Force.
2. IEEE 1076-1993 Significant improvements resulting from several years of feedback. Probably the most widely used version with the greatest vendor tool support.
3. IEEE 1076-2000 Minor revision. Introduces the use of protected types.
4. IEEE 1076-2002 Minor revision of 1076-2000. Rules with regard to buffer ports are relaxed.
IEC 61691-1-1:2004[6] IEC adoption of IEEE 1076-2002
5. IEEE 1076-2008 (previously referred to as 1076-200x) Major revision released on 2009-01-26.   Among other changes, this standard introduces the use of external names.
6. IEC 61691-1-1:2011 IEC adoption of IEEE 1076-2008

Graphical HDL Entry
Related standards:

1. IEEE 1076.1 VHDL Analog and Mixed-Signal
2. IEEE 1076.1.1 VHDL-AMS Standard Packages
3. IEEE 1076.2 VHDL Math Package
4. IEEE 1076.3 VHDL Synthesis Package
5. IEEE 1076.3 VHDL Synthesis Package - Floating Point
6. IEEE 1076.4 Timing (VHDL Initiative Towards ASIC Libraries: vital)
7. IEEE 1076.6 VHDL Synthesis Interoperability
8. IEEE 1164 VHDL Multi Valued Logic (std_logic_1164) Packages

The key advantage of VHDL, when used for systems design, is that it allows the behavior of the required system to be described (modeled) and verified (simulated) before synthesis tools translate the design into real hardware (gates & wires).
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